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From: ldo@waikato.ac.nz (Lawrence D'Oliveiro)
Newsgroups: comp.arch
Subject: Re: PUSH on i8088/i80x86
Summary: Deja vu
Message-ID: <1990Jan15.064658.1816@waikato.ac.nz>
Date: 15 Jan 90 06:46:58 GMT
References: <1261570140@<182DAVISTD@MSU> > <208300005@prism>
Sender: ldo@waikato.ac.nz
Organization: University of Waikato, Hamilton, New Zealand
Lines: 18

This problem with pre/post-decrementing of SP in the Intel CPUs--
there's another chip family with this quirk too. The analogous
sequence

	mov	sp, -(sp)

is supposed to give different results on different members of
the PDP-11 family. I may be wrong (it's been a while since I've
programmed a PDP-11) but the behaviour might occur if you replace
SP with any of the other registers, as well.

Anybody else remember this? Or am I just showing my age?

Lawrence D'Oliveiro
Computer Services Dept
Waikato University
Hamilton
New Zealand