Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!swrinde!zaphod.mps.ohio-state.edu!usc!apple!sun-barr!newstop!sun!amdahl!key!sjc
From: sjc@key.COM (Steve Correll)
Newsgroups: comp.arch
Subject: Re: Integer Multiply/Divide on Sparc
Message-ID: <1379@key.COM>
Date: 16 Jan 90 17:46:01 GMT
References: <8840005@hpfcso.HP.COM> <1249@otc.otca.oz> <2819@auspex.auspex.com>
Organization: Key Computer Labs, Fremont, CA
Lines: 14

In article <2819@auspex.auspex.com>, guy@auspex.auspex.com (Guy Harris) writes:
> ...I can't speak for MIPS, but I wouldn't be surprised to hear that even
> though they had a multiply instruction since Day 1 they still did shifts
> and adds for multiplies by constants.

Right. (As of 2 years ago, anyway) the MIPSCo compilers compare the number of
cycles for hardware multiply against the cycles for the necessary series of
shifts and adds, and emit the cheaper alternative. They also shift and mask
(adjusting for the sign bit as needed) in lieu of div and rem by powers of 2.
This happens in the non-ASCII back end of the assembler, which the compilers
employ to create the object file, so compilers and humans alike can code "mul"
and let the assembler figure out the tradeoff.
-- 
...{sun,pyramid}!pacbell!key!sjc 				Steve Correll