Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!usc!ucsd!ucbvax!pro-generic.cts.com!sb From: sb@pro-generic.cts.com (Stephen Brown) Newsgroups: comp.sys.apple Subject: Re: Really small question (warning: long tutorial) Message-ID: <9298.infoapple.net@pro-generic> Date: 14 Jan 90 07:57:18 GMT Sender: daemon@ucbvax.BERKELEY.EDU Organization: The Internet Lines: 25 In-Reply-To: message from kadickey@phoenix.Princeton.EDU In this message, it is claimed that calling the Apple IIe clock speed 1.00 Mhz is good enough for most purposes. Well, not really, and certainly not if you're doing any timing (say timed loops in which you're changing video modes). The frequency would by 1.022727 Mhz (14.31818 master clock divided by 14) if life were simple. Life is not simple. One cycle out of every 65 cycles is longer than the rest. The long cycle frequency is 0.89488625 Mhz, bringing the composite frequency to 1.02048432 Mhz. If a loop is written in a multiple of 65 cycles, then it will always take the same time to execute. If not, then the loop time may vary by 140nS. PAL (phase alternating line) or European Apple II's run at a slightly different frequency because there are a greater number of horizontal scans and a fewer number of frames. I believe PAL motherboards' composite frequency is 1.015625 Mhz. Excuse my sloppiness for significant figures! UUCP: crash!pro-generic!sb ARPA: crash!pro-generic!sb@nosc.mil INET: sb@pro-generic.cts.com