Path: utzoo!utgpu!jarvis.csri.toronto.edu!clyde.concordia.ca!uunet!bnrgate!bnr-fos!bigsur!bnr-rsc!bcarh185!schow
From: schow@bcarh185.bnr.ca (Stanley T.H. Chow)
Newsgroups: comp.sys.amiga
Subject: Re: 68040 vs 80246 (Was Re: Xerox sues Apple!!!)
Message-ID: <1617@bnr-rsc.UUCP>
Date: 20 Dec 89 15:16:40 GMT
References: <824@mindlink.UUCP>
Sender: news@bnr-rsc.UUCP
Reply-To: bcarh185!schow@bnr-rsc.UUCP (Stanley T.H. Chow)
Organization: BNR Ottawa, Canada
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In article <824@mindlink.UUCP> a218@mindlink.UUCP (Charlie Gibbs) writes:
>
>Does anyone have any more horror stories?
>

How about the inconsistancy between 68000 & 68010? (Specifically the MOVESR
problem).

For myself, I prefer the Intel approach - that is, make the successors
have exactly the same bugs as well. That way, a pin-compatible '010 will
really be pin-compatible.

How about the '020 MMU being a subset of the '851 MMU? Not a bug, but
certainly an extremely undesirable feature for a later member of any
architecture family.

Stanley Chow        BitNet:  schow@BNR.CA
BNR		    UUCP:    ..!psuvax1!BNR.CA.bitnet!schow
(613) 763-2831		     ..!utgpu!bnr-vpa!bnr-rsc!schow%bcarh185
Me? Represent other people? Don't make them laugh so hard.