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From: mshute@r4.uucp (Malcolm Shute)
Newsgroups: comp.arch
Subject: Re: Indirect addressing on SIMD architectures
Message-ID: <1080@m1.cs.man.ac.uk>
Date: 14 Mar 90 16:52:42 GMT
References: <8332@hubcap.clemson.edu>
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Reply-To: mshute@r4.UUCP (Malcolm Shute)
Organization: University of Manchester, UK
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In article <8332@hubcap.clemson.edu> billo@nova.npac.syr.edu (Bill O) writes:
>[about indirect addressing on SIMD]

Can I ask the net for some clarification on some of the points which he
makes, (especially wrt the most useful interpretation of Flynn's notation).

>SIMD implies that every processor must be doing the same thing at the
>same time, and that usually means addressing the same data at the same
>time.
Though, if I say to every processor "copy contents of i-th cell to the
4th cell"  (where the value in 'i' is different on each machine), then
I am indeed making them do the same thing at the same time.
    * I note, however, your use of the words "usually means" to indicate what
      tends to happen in most practical implementations to date.
    * I have assumed that by the words "same data" you mean "same address",
      since being siMD, it must have access to multiple data streams.

>      In terms of implementation, SIMD machines typically have bit
>serial processors which are partitioned into small groups to share
>memory chips and the like. Only one address is presented to each
>memory chip, which produces a word full of data, which is then split
>off into individual bits for each processor in the associated group.
>Thus there is no opportunity for each processor to provide its
>own address.

Right, this is where I really question the value of this interpretation
of Flynn's notation.

What you have described seems to me to be a description of any SISD
machine which can be implemented using bitslicing.  There's nothing
wrong in that, of course.  My question to the net is, however, what is
the value of the classification scheme if we can lump all bitwise-parallel
von Neumann computers into the SIMD slot.

Viewed the other way, if all of the processors access memory addresses
in strict harmony like this, then they are only biting off parts of
the *same* data stream.  (And hence all qualify as being SISD).
Surely, it is only the MAMD machines which you mentioned later
which can claim to qualify as true SIMD.

Just a thought.

Malcolm SHUTE.         (The AM Mollusc:   v_@_ )        Disclaimer: all