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From: tarolli@riva.esd.sgi.com (Gary Tarolli)
Newsgroups: comp.arch,comp.sys.sgi
Subject: Re: load instruction on MIPS R2000 and R3000
Summary: its predictable but...
Message-ID: <53751@sgi.sgi.com>
Date: 15 Mar 90 17:41:14 GMT
References: <1990Mar14.165530.17748@hellgate.utah.edu>
Sender: tarolli@riva.esd.sgi.com
Organization: Silicon Graphics, Inc., Mountain View, CA
Lines: 22

In article <1990Mar14.165530.17748@hellgate.utah.edu>, moore%cdr.utah.edu@cs.utah.edu (Tim Moore) writes:
> On the MIPS R2000 and R3000 processors, does the following instruction
> have predictable results?
> 
> 	lw	$1,some_disp($1)
> 
> $1 is also $at and is used internally by the MIPS assembler, but I'm
> not using the MIPS assembler.

Yes, it is predicatable - two cycles later $1 will contain the data located
at some_disp($1).  Note $1 cannot be used in the cycle immediately
following the lw instruction, however other instructions including lw can
be done there.  If you were using the assembler, you could use 
	.set	noat
to tell the assembler not to use $at.

If you are not using the assembler, then I assume you are generating
object code yourself. If you are doing this while the program is running
then don't forget to flush the icache.  In either case, you must respect
the load delay of 1 cycle.
--
						Gary Tarolli