Path: utzoo!attcan!uunet!samsung!zaphod.mps.ohio-state.edu!mips!apple!baum
From: baum@Apple.COM (Allen J. Baum)
Newsgroups: comp.arch
Subject: Re: Dynamic internal state
Message-ID: <39641@apple.Apple.COM>
Date: 19 Mar 90 18:38:19 GMT
References: <32937@shemp.CS.UCLA.EDU> <132903@sun.Eng.Sun.COM> <36999@mips.mips.COM> <1690@east.East.Sun.COM>
Reply-To: baum@apple.UUCP (Allen Baum)
Organization: Apple Computer, Inc.
Lines: 15

[]
>In article <1690@east.East.Sun.COM> sgolson@pyrite.East.Sun.COM (Steve Golson) writes:
>The on-chip caches of the 68030 (and 68020) use 4T RAM cells that must be
>periodically refreshed.

If the cells used by the 680x0 are the same as those used in their
88200, then they are not dynamic. There are 4 transistors, and 2
pullup resistors. Most 6T cells use pullup transistors, because
they're smaller. Moto's process has a high resistance poly layer, and
the two resistors are place right on top of the transistors, so they
take no space (except in the third dimension).

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