Path: utzoo!utgpu!news-server.csri.toronto.edu!clyde.concordia.ca!uunet!samsung!brutus.cs.uiuc.edu!jarthur!elroy.jpl.nasa.gov!cit-vax!ktl From: ktl@wag240.caltech.edu (Kian-Tat Lim) Newsgroups: comp.arch Subject: Re: Killer Micros and vectorized code Message-ID: <14357@cit-vax.Caltech.Edu> Date: 20 Mar 90 17:58:06 GMT References: <51771@lll-winken.LLNL.GOV> <100598@convex.convex.com> <52661@lll-winken.LLNL.GOV> <100701@convex.convex.com> Sender: news@cit-vax.Caltech.Edu Reply-To: ktl@wag240.caltech.edu (Kian-Tat Lim) Organization: California Institute of Technology, Pasadena, CA Lines: 25 In-reply-to: hamrick@convex1.convex.com (Ed Hamrick) In article <100701@convex.convex.com>, hamrick@convex1 (Ed Hamrick) writes [in reference to the Alliant FX/2800]: >If you have a chance, ask the Alliant people what their Linpack 100x100 >performance is, and see how well it scales up to 28 processors. Try to >get real runs, not estimates. I'd also be curious about main memory >bandwidth (not crossbar bandwidth). Information like number of banks, >number of bytes read per bank access, and bank cycle time would be >particularly interesting. From publicly-available Alliant literature: MEMORY SYSTEM Cache size 512KB per module, 4MB max Processor to Cache Bandwidth: 1.28GB/sec [through the crossbar] Maximum Physical Memory: 1GB Interleaving: 16-way on a single board Memory Bus Bandwidth: 640MB/sec I believe that Alliant has run 100x100 Linpack on a 28 processor system, but I'm not sure if that figure has been made public. It's probably obvious that it won't be 28 times the raw i860 number (11 MFLOPS). -- Kian-Tat Lim (ktl@wagvax.caltech.edu, KTL @ CITCHEM.BITNET, GEnie: K.LIM1) Perl is the Swiss Army chainsaw [of Unix programming]. -- Dave Platt's friend