Path: utzoo!attcan!uunet!samsung!usc!elroy.jpl.nasa.gov!ames!pacbell!osc!jgk
From: jgk@osc.COM (Joe Keane)
Newsgroups: comp.arch
Subject: Re: Dynamic internal state (was Re: Scoreboards / Load-interlocks)
Summary: Add checks to detect bit rot.
Keywords: dynamic memory
Message-ID: <2237@osc.COM>
Date: 20 Mar 90 22:34:05 GMT
References: <11337@encore.Encore.COM> <3300106@m.cs.uiuc.edu> <32937@shemp.CS.UCLA.EDU> <132903@sun.Eng.Sun.COM> <39538@apple.Apple.COM> <22182@watdragon.waterloo.edu> <RAJE.90Mar19143422@dolores.Stanford.EDU>
Reply-To: jgk@osc.COM (Joe Keane)
Organization: Object Sciences Corp., Menlo Park, CA
Lines: 5

Hmm, if you can guarantee that bits only decay in one direction (say 1->0)
then all you have to do is add a few check bits to each cache entry.  When one
or more of the data bits decays, you'll know the entry is invalid.  Of course,
the check bits might decay even though the data bits are OK, in which case
you'd also say the entry is invalid.