Xref: utzoo comp.lang.c:27081 comp.lang.misc:4545 Path: utzoo!utgpu!news-server.csri.toronto.edu!mailrus!uwm.edu!zaphod.mps.ohio-state.edu!mips!bridge2!jarthur!uunet!mcsun!hp4nl!bsovax!albert From: albert@bsovax.UUCP (Albert van der Horst) Newsgroups: comp.lang.c,comp.lang.misc Subject: Re: function calls (long) Summary: heading for the ideal processor architecture Message-ID: <584@bsovax.UUCP> Date: 20 Mar 90 18:42:27 GMT References: <29509@amdcad.AMD.COM> <12350@goofy.megatest.UUCP> Reply-To: albert@BSOVAX.UUCP (Albert van der Horst) Followup-To: above Organization: BSO/AT, P.O.Box 8052, 3503 RB UTRECHT, The Netherlands Lines: 78 In article <12350@goofy.megatest.UUCP > djones@megatest.UUCP (Dave Jones) writes: > ( In a follow up on Tim Olson)c >What I would like to see is a register-set that acts as the cache for >a virtual stack in a machine with true stack machine instructions. That >would be my idea of a really good time, although it might put some graph >colorers out of business, having no registers to allocate. Does anybody >know if such a scheme was proposed for SPARC, and if so, why it was >rejected? Seems like such a win, and not all that big a step >beyond the register-window approach. This idea is not new. It is about time for this idea to provide the most ideal machine to write compilers for. There is a weird language that you may not know about. It is called FORTH, and it is based on a virtual machine. This virtual machine is IMHO exactly right. It has two stacks, one for the return addresses, and one for the calculation; the latter is visible to the FORTH programmer. The designer of FORTH, Charles Moore, has cast this idea into silicon. This resulted in a RISC chip (NOVIX 4000) with some amazing properties. For instance, a one cycle call, and mostly a FREE return from a subroutine. It also allocates registers as needed. I was the president of a small group in the Netherlands that explored this idea independantly. We got far enough to create a working emulator (written in FORTH...) for our chip, baptized FIETS (Fast implementation of Enhanced Translators and Systems, by sheer accident also the dutch word for bycicle). Then came Moore and interest in the project faded. Two of the group members gained hands on experience with the NOVIX, resulting in for example a program that generates a video signal by toggling an output pin, showing a picture with the name "NOVIX". Despite some coverage by BYTE the NOVIX did not become a succes at all. In my opinion, real mistakes were the lack of a C-compiler for it - the FIETS contained 16 stack based general purpose registers, that would have made such a C-compiler viable. The NOVIX registers were much less in number, caused by a too narrow Forth based scope. Also Charles Moore still insists that programs needing more than a 16 bit address range are desing errors.... Marketing was directed towards the incrowd of FORTH programmers. Probably very few of you would have noted the value of the chip from the BYTE article. Even to a FORTH- literate the article in BYTE was hard to digest. The end was: NOVIX went out of business. Fortunately, the basic idea's have been bought by Harris Semiconductor's and they know better what makes a processor sing. They have already produced a few practically successful designs, and are still developping it further. These chips are optimized for real time signal processing, and have extremely fast context switches. (switching stacks, no registers to save) I do hope we will arrive at the processor bottom line. The bottom line is this. You have the choice between your code being inline, or a single cycle call/return overhead. All instructions (let's say almost) do something usefull, like addition, putting the result in a new register "on the fly" if required. Or on the other hand adding an offset to a base address will drop the offset from the stack automatically. I think " the register caching via stacks" is much easier to implement than the register window stuff. And as far as I can see, it is easier on the compiler optimizer too. N.B. Those interested (Harris?) may mail me for the FIETS instruction set. N.B. I am currently exploring transputers, that also have an "allocate register as needed" mechanism, without overflowing however and very shalllow. View expressed are my own { not all FIETS members would agree. { my boss does not know what I am talking about Albert van der Horst {eunet!mcvax!hp4nl!bsovax!albert} P.O. 8052 3053 RB Utrecht " It's pitch dark. You might be eaten by a grue" The netherlands " I hope you got more light than from a lamp"