Path: utzoo!utgpu!news-server.csri.toronto.edu!mailrus!uunet!samsung!cg-atla!langlais
From: langlais@cg-atla.agfa.com (Ken Langlais)
Newsgroups: comp.lsi
Subject: call for discussion "boundary scan"
Keywords: testability, boundary scan, JTAG, IEEE 1149
Message-ID: <8491@cg-atla.agfa.com>
Date: 20 Mar 90 11:35:52 GMT
Distribution: usa
Organization: Agfa Compugraphic Division, Wilmington, Mass. USA
Lines: 30



	I would like to start a discussion on the topics of testability,

	boundary scan, and JTAG. If this discussion generates enough interest

	I will start a news group. I myself am just starting to look at

	boundary scan as a method of testing high density boards with

	surface mount technology. The only information I have been able to

	acquire is a booklet called Testability from TI. Is also speaks of

	IEEE 1149.1. When I did a call for a news group on this subject in

	news.groups I found out that the IEEE 1149.1 has been revised and is

	now 1149.3.

				Thankyou

				   Ken


-- 

	**********************************************************
	* Of all the things I lost, I miss my mind the most!!!!! *
	**********************************************************