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From: swarren@convex.com (Steve Warren)
Newsgroups: comp.sys.amiga
Subject: Re: Amiga 3000
Message-ID: <100578@convex.convex.com>
Date: 14 Mar 90 16:58:04 GMT
References: <13479@baldrick.udel.EDU> <9884@batcomputer.tn.cornell.edu> <6857@cps3xx.UUCP> <3944@nmtsun.nmt.edu> <6360@sbcs.sunysb.edu> <3951@nmtsun.nmt.edu> <6398@sbcs.sunysb.edu>
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In article <6398@sbcs.sunysb.edu> root@sbcs.sunysb.edu (Systems Staff) writes:
>In article <3951@nmtsun.nmt.edu> dksnsr@nmtsun.nmt.edu (Dr. Mosh) writes:
                                    [...]
>>...based on pure processing performance, the 68040 IS Faster...
                                    [...]
>	without qualifying it, thus it is meaningless.  Motorola claims the
>	'040 to have an CPI that is roughly the same as some current RISC
>	chips, so that would indicate for some applications, at the same clock 
>	speed and using '040 instructions that are pipelined, it *might* (if
>	Motorola marketspeak is roughly true) run same speed as current Sparc.
                                    [...]

The statements I have read about code density state that RISC code on the
average is about 1.3 times longer than equivalent CISC code.  Thus, if the
CPI average quoted above for the '040 is for typical 680X0 code (and not
special hand-picked code) then it would be expected that the '040 would
beat SPARC at the same clock speeds.

ie       time spent = CPI(avg) * [# of instructions] * clock speed

If CPI and clock speeds are the same, and CISC is known to require less
instructions on the average, then I don't have a problem with the '040
being faster.  Doesn't necessarilly mean its's so, but it does make sense.

--
--Steve
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