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From: toddpw@tybalt.caltech.edu (Todd P. Whitesel)
Newsgroups: comp.sys.apple
Subject: Re: Harvard Architecture
Message-ID: <1990Mar17.130312.18772@spectre.ccsf.caltech.edu>
Date: 17 Mar 90 13:03:12 GMT
References: <3602.25f919c8@vax5.cit.cornell.edu> <1179@madnix.UUCP>
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jason@madnix.UUCP (Jason Blochowiak) writes:

>	Now, the 680x0's architecture discourages self-modifying code, so
>it's not too painful for it to go Harvard, but the 65816 & 6502 programmers
>of the world do use self-modifying code (despite the fact that it's a real
>pain to debug), and that would pretty much invalidate the entire code/data
>separation.

I don't that that's too much of a problem, that data paths on the chip should
have no problem allowing the I-cache to be accessed as if they were external
cache RAM. This would slow down the self-modifiying operations but I don't
see it as a major performance problem. The '816 has many instructions which
do what most people used self-modifiying code for on the 6502...

Todd Whitesel
toddpw @ tybalt.caltech.edu