Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!usc!srhqla!nrcvax!rick
From: rick@NRC.COM (Rick Wagner)
Newsgroups: comp.sys.ibm.pc
Subject: Re: Why The Move To RISC Architectures?  ('386 vs. RISC)
Message-ID: <495@nrcvax.NRC.COM>
Date: 21 Mar 90 19:46:50 GMT
References: <1990Mar20.233504.4946@seri.gov>
Reply-To: rick@nrcvax.UUCP (Rick Wagner)
Organization: Network Research Corp., Oxnard CA
Lines: 55

Will@cup.portal.com (Will E Estes) writes:

>Finally, why is everyone so excited about RISC?  Why the move to
>simplicity in microprocessor instruction sets?  You would think
>that the trend would be just the opposite - toward more and more
>complex instruction sets - in order to increase the execution
>speed of very high-level instructions by putting them in silicon
>and in order to make implementation of high-level language
>constructs easier.

Ask Seymore Cray ;-).  Back when IBM was impressing themselves with
the CISC architecture of the 3[67]0 series of main-frame computer,
Seymore Cray was designing the CDC 6000 series machine (circa 1966 I
think, thus the top of the line 6000 was the 6600.  Maybe they came
out with one each year: 6200, 6300,.., 6600?).  The 6000 series was
basically CISC, which because of its simplicity in design, allowed the
instructions to be hard-wired, instead of micro-coded like many of the
CISC machines.  So while you had to use more elementary instructions,
the CDCs could really plow through them, making the program level
throughput relatively high.

And after all, most of you program boils down to a few basic
instructions: add(/subtract, basically the same thing), compare
(essentially a subtract), move and branch, and a bunch of multiplies
for indexing, or if you have a math intensive program.  So if your
machine is optimized to run 90% of your instructions, your program is
going to be fast.

The RISC architecture also made it much easier to design "segmented"
(not the Intel address space definition) cpus.  The cpu was actually a
bunch of dedicated processing units, each of which executed only
specific groups of instructions.  Thus you had multiple, parallel
instructions being executed.  By coding your instructions sequences
properly, the machine could run at one instruction per (very fast)
clock, even if you used slower (multiply - 7 clocks) instructions in
your loop.

Thus it was that the Cyber series (6000, 7000, 170 series) were the
"power" machines of the '60s, '70s, and first couple years of the
'80s.  That dominance was toppled by Cray when he introduced the
CRAY-1.

The same philosophy is now being realized in the micro-computer
industry.  With memory becoming "cheap", more space can be burnt on
program size, and the CPU design can concentrate on optimizing the
basic instructions, and parallelism.

	--rick

-- 
===============================================================================
Rick Wagner						Network Research Corp.
rick@nrc.com						2380 North Rose Ave.
(805) 485-2700	FAX: (805) 485-8204			Oxnard, CA 93030
Don't hate yourself in the morning; sleep 'til noon.