Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!usc!zaphod.mps.ohio-state.edu!sol.ctr.columbia.edu!emory!mephisto!mcnc!rti!bcw From: bcw@rti.rti.org (Bruce Wright) Newsgroups: comp.sys.ibm.pc Subject: Re: Why The Move To RISC Architectures? ('386 vs. RISC) Summary: Mips and hype Message-ID: <3685@rtifs1.UUCP> Date: 22 Mar 90 22:08:51 GMT References: <28011@cup.portal.com> <40970054@hpindda.HP.COM> <2607b76e.5ca0@polyslo.CalPoly.EDU> Organization: Research Triangle Institute, RTP, NC Lines: 34 In article <2607b76e.5ca0@polyslo.CalPoly.EDU>, jdudeck@polyslo.CalPoly.EDU (John R. Dudeck) writes: > > A few weeks ago I made the remark on the net that it seems meaningless to > compare RISC MIPS with CISC MIPS. I was soundly rebutted by any number > of netters telling me that all the manufacturers use VAX MIPS > when rating their cpu's. In other words, benchmarks are run for various > types of cpu-intensive applications, and the results are compared to the > same benchmarks on a VAX 11/780, which is the platinum standard by which > all cpu's are measured. Unfortunately, although this might be useful in some situations, it is too often abused: the manufacturer tries a number of benchmarks, and advertizes the one that shows his machine off the best, as if it were the typical case rather than the best case. Unfortunately, not all machines perform their operations with equal efficiency - even VAXes don't all execute all their instructions in times that are simple multiples of each other. And we are probably all aware of how far off things like the Norton SI index are for PC's. This is even worse when you are talking about machines with such drastically different machine architectures as a VAX and a RISC machine - sometimes you can find situations where a single VAX instruction -> a single RISC instruction, and other times a VAX instruction -> several dozen (or hundred) RISC instructions. Comparison for all possible applications is extremely difficult, which enhances the probability that at least one benchmark will show off one machine particularly well against another. And, of course, sometimes machines and compilers are designed with a particular benchmark _in mind_, resulting in even more anomolous results. In fairness this isn't new with the RISC-CISC debate - it's a tradition that's been going on for decades. Bruce C. Wright