Path: utzoo!attcan!uunet!tut.cis.ohio-state.edu!ucbvax!tesun2.UUCP!clare From: clare@tesun2.UUCP (Peter Clare) Newsgroups: comp.sys.transputer Subject: More undocumented instructions Message-ID: <9003201450.AA01756@flay.thorn-emi-crl.co.uk> Date: 20 Mar 90 14:50:27 GMT Sender: daemon@ucbvax.BERKELEY.EDU Organization: The Internet Lines: 54 Further to the recent discussion on undocumented transputer instructions, here are some more instructions that I am aware of (in addition to the "testhardchan" instruction mentioned previously). I know little more about these instructions other than their operation codes and their mnemonics: Operation code (hex) Mnemonic -------------------- -------- 23 testlds 24 testlde 25 testldd 26 teststs 27 testste 28 teststd 2D testhardchan 80 fpsttest 85 fpldtest A7 fpentry3 A9 fpentry2 >From the mnemonics, one can guess at what some of these instructions might do. In particular, the two extra fpentry instructions look interesting. If they work like the normal fpentry instruction then they could lead to a whole load of extra floating point instructions. If you are familiar with the transputer instruction set then you will see that these extra instructions fill in some of the "gaps" between the documented instructions. Here are some questions. Can anyone on the transputer grapevine provide any answers? 1) Are there any more undocumented instructions? 2) What do these instructions do? How do they affect registers and what are the cycle times? 3) Are any of these instructions of any real use other than for testing purposes? 4) Which instructions are supported on which types of transputer? =============================================================================== Peter Clare THORN EMI Central Research Laboratories Dawley Road Hayes Middlesex UB3 1HH Tel: 01-848-6521 Fax: 01-848-6565 Eurokom: Peter Clare THORN EMI email: clare@thorn-emi-crl.co.uk ===============================================================================