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From: zenith-steven@cs.yale.edu (Steven Ericsson Zenith)
Newsgroups: comp.sys.transputer
Subject: Re: More undocumented instructions
Message-ID: <19608@cs.yale.edu>
Date: 20 Mar 90 23:12:19 GMT
References: <9003201450.AA01756@flay.thorn-emi-crl.co.uk>
Sender: news@cs.yale.edu
Reply-To: zenith-steven@cs.yale.edu (Steven Ericsson Zenith)
Organization: Yale University Computer Science Dept., New Haven, CT  06520-2158
Lines: 32

In article <9003201450.AA01756@flay.thorn-emi-crl.co.uk>,
clare@tesun2.UUCP (Peter Clare) writes:
   I know little more
  about these instructions other than their operation codes and their
  mnemonics:

     Operation code (hex)		Mnemonic
     --------------------		--------
 		23			testlds
 		24			testlde
 		25			testldd
 		26			teststs
 		27			testste
 		28			teststd

...
 
     2)	What do these instructions do?  How do they affect registers and
	what are the cycle times? 

You mean the load and store Status Register, E Register and D Register?
Nah ... you don't want to know :-) (tease!). Maybe you should ask an
INMOS FAE... maybe he doesn't know. Maybe you should read my book when
it comes out (how to put the fear of god in INMOS :-) Nah! just kidding
guys ... honest!)

--
.                                                                        .
Steven Ericsson Zenith              *            email: zenith@cs.yale.edu
Department of Computer Science      |            voice: (203) 432 1278
Yale University 51 Prospect Street New Haven CT 06520 USA.
     "All can know beauty as beauty only because there is ugliness"