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From: whit@milton.acs.washington.edu (John Whitmore)
Newsgroups: sci.electronics
Subject: Re: JFET Confusion
Summary: Probably bad schematic
Keywords: devices fet op-amp
Message-ID: <2440@milton.acs.washington.edu>
Date: 16 Mar 90 09:30:28 GMT
References: <7310@rice-chex.ai.mit.edu>
Reply-To: whit@milton.acs.washington.edu (John Whitmore)
Organization: University of Washington, Seattle
Lines: 23

In article <7310@rice-chex.ai.mit.edu> mikec@ai.mit.edu (Mike E. Ciholas) writes:
>
>The way I understand JFETs, N channel types in particular, is that you must
>supply a negative gate voltage on the order of -5V to turn them off
>(the 2N4092 is a depletion mode JFET).
>
>Since the LF355 is supplied from the INPUT voltage to ground, its output
>range must be within this voltage, therefore it cannot turn off the
>JFET.
>
	You are probably correct (the 2N4092 has some dozens of milliamps
drain current at zero Vgs); there is a similar circuit in Horowitz and Hill,
but using an enhancement-mode MOSFET (any power MOSFET would work as well).
Either the negative supply for the op amp must be BELOW ground, or the
FET should have zero current at low bias.  
	OR, the circuit will not work at low current input.  There remains,
however, the possibility that low currents will never need measurement
by this circuit...  The voltage developed on R3 can reverse bias
the JFET into normal operation, but that limits the useful output
to about 3 volts minimum (two volts for the FET, one for the op amp
output drive circuit).

			John Whitmore