Path: utzoo!attcan!uunet!zephyr.ens.tek.com!tekcrl!tekgvs!arnief
From: arnief@tekgvs.LABS.TEK.COM (Arnie Frisch)
Newsgroups: sci.electronics
Subject: Re: JFET Confusion
Summary: current feedback
Keywords: devices fet op-amp
Message-ID: <7119@tekgvs.LABS.TEK.COM>
Date: 16 Mar 90 17:46:41 GMT
References: <7310@rice-chex.ai.mit.edu>
Organization: Tektronix Inc., Beaverton, Or.
Lines: 9

In article <7310@rice-chex.ai.mit.edu>, mikec@wheaties.ai.mit.edu (Mike E. Ciholas) writes:
............
> The way I understand JFETs, N channel types in particular, is that you must
> supply a negative gate voltage on the order of -5V to turn them off
> (the 2N4092 is a depletion mode JFET).

In the circuit you supplied, the voltage across R3 - caused by
conduction of the fet, supplies the required negative bias between the
gate and source.