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From: koonce@brahms.berkeley.edu (tim koonce)
Newsgroups: comp.sys.m6809
Subject: Re: Single Stepping a 6809
Summary: Set breakpoints.
Message-ID: <1990Mar27.204131.821@agate.berkeley.edu>
Date: 27 Mar 90 20:41:31 GMT
References: <4267@harrier.ukc.ac.uk>
Sender: koonce@math.berkeley.edu
Reply-To: koonce@brahms.berkeley.edu (tim koonce)
Followup-To: comp.sys.m6809
Organization: University of California, Berkeley
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In article <4267@harrier.ukc.ac.uk> has@ukc.ac.uk (H.A.Shaw) asks about
single-stepping a 6809 processor.

   I'm not a hardware type, but I see two possible approaches.  One is
to have an interrupt fire after the first clock cycle of the instruction.
The interrupt will be serviced as soon as the instruction is finished,
providing an effective single-step.
   Another more software-oriented approach is to determine the
instruction length, and set a breakpoint (SWI) after the instruction.
The only special cases are branch and jump instructions, returns,
interrupt instructions (i.e. SWI, RTI), and exchanges involving the
PC.  The flow-of control instructions can be handled by setting two
breakpoints, one after the instruction, and one at the branch target.
When the single-step key is pressed, just set the breakpoints,
execute, and remove the breakpoints.  This is simplified by the fact
that you don't need a full disassembly of the current instruction, you
just need the instruction length, and whether it's in one of the
special cases above.  Assuming that you can handle breakpoints, this
provides a way to extend that to get single-step ability.  The obvious
disadvantage is that you can't single-step through ROM this way.

					 - Tim Koonce