Path: utzoo!attcan!uunet!wuarchive!psuvax1!news
From: flee@shire.cs.psu.edu (Felix Lee)
Newsgroups: comp.arch
Subject: Re: Black magic, IBM RIOS.
Message-ID: <E2&79e5@cs.psu.edu>
Date: 10 Apr 90 19:33:48 GMT
References: <PCG.90Apr3204004@odin.cs.aber.ac.uk>
	<1990Apr4.140713.8996@specialix.co.uk>
	<PCG.90Apr9120504@odin.cs.aber.ac.uk>
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Piercarlo Grandi <pcg@cs.aber.ac.uk> wrote:
> register timings for the 3240 (and the MIPS inner loop is 4
> instructions) imply 16M*4 instructions in 1 second, that is 64 MIPS. I
> cannot believe that the 25 Mhz R3000 os superscalar as well.

Be careful when you examine the machine code.  On a MIPS RC3240, the
inner loop is unrolled, so it only gets executed 4M times, not 16M,
and it contains 6 instructions, not 4.  This is 4M*6 instructions in
1.0s, which is 24 native MIPS, a reasonable number.
--
Felix Lee	flee@shire.cs.psu.edu	*!psuvax1!flee