Path: utzoo!utgpu!news-server.csri.toronto.edu!mailrus!umich!yale!think!samsung!uunet!brunix!phg From: phg@cs.brown.edu (Peter H. Golde) Newsgroups: comp.arch Subject: Re: Black magic, IBM RIOS. Message-ID: <36107@brunix.UUCP> Date: 12 Apr 90 00:17:14 GMT References: <1990Apr4.140713.8996@specialix.co.uk> <18208@rpp386.cactus.org> Sender: news@brunix.UUCP Reply-To: phg@cs.brown.edu (Peter H. Golde) Organization: Brown University Department of Computer Science Lines: 16 In article <18208@rpp386.cactus.org> jfh@rpp386.cactus.org (John F. Haugh II) writes: >I tested a 20MHz S/6000 with a backlevel compiler and managed to [ only ] >produce 2.1 seconds for the register loop. I don't know if it was 7 >instructions, but assuming it was yields > > 4096 x 4096 x 7 / 2.1 = 55,924,053 instructions per second > >which translates to 2.8 instructions per cycle. I tested my 386 machine on the register loop and it took 0.0 seconds (it doesn't even HAVE an inner loop). Does this mean it's faster than an S/6000? (and to think I never knew....) I hereby name this benchmark "Dhumbstone". :-) :-) :-) --Peter Golde (phg@cs.brown.edu)