Path: utzoo!utgpu!news-server.csri.toronto.edu!clyde.concordia.ca!uunet!cs.utexas.edu!usc!zaphod.mps.ohio-state.edu!van-bc!ubc-cs!uw-beaver!Teknowledge.COM!unix!hplabs!hpfcso!hpldola!hp-lsd!dave From: dave@hp-lsd.COS.HP.COM (David C. Mueller) Newsgroups: comp.realtime Subject: Re: Predicting Execution Times for Processors with caches Message-ID: <15630005@hp-lsd.COS.HP.COM> Date: 12 Apr 90 15:54:17 GMT References: <765@telesoft.com> Organization: HP Logic Systems Division - ColoSpgs, CO Lines: 15 > >Even if you disable the 68020's caches, you still must worry that your >runtime data may be misaligned in memory. The 68020 will happily >compensate for this, slowing down your program considerably. In my >opinion, you should stop thinking about the 68020 for real-time >systems, and start thinking about highly deterministic RISC processors >such as the R2000, or perhaps the MC88000. This problem can be resolved by assembler/linker tools. The assmelber I'm familiar with has an option whereby any symbol can be forced to a 32-bit boundary. I like to think of the 68020 as providing me with the option of code space optimization and memory size independence by aligning 16 and 8 bit values on byte boundaries.