Path: utzoo!utgpu!news-server.csri.toronto.edu!mailrus!uunet!samsung!zaphod.mps.ohio-state.edu!mips!apple!bionet!ucselx.sdsu.edu!petunia!news
From: rbannon@mira.acs.calpoly.edu (Roy Bannon)
Newsgroups: comp.sys.apple2
Subject: Re: TransWarp III
Summary: PLCC package
Message-ID: <2624f686.20df@petunia.CalPoly.EDU>
Date: 12 Apr 90 21:43:34 GMT
References: <9004121815.AA18119@mrcnext.cso.uiuc.edu>
Reply-To: rbannon@mira.acs.calpoly.edu.UUCP (Roy Bannon)
Organization: Cal Poly State University -- San Luis Obispo
Lines: 19


In article <9004121815.AA18119@mrcnext.cso.uiuc.edu> alfter@MRCNEXT.CSO.UIUC.EDU (Scott Alfter) writes:
>mojo!cyliao@mimsy.umd.edu (Chun-Yao Liao) writes:
>------------------------------------start------------------------------------
>But why don't they put the 20/28 MHz 65816 instead? and selling at $200 is
>a resonable price then.
>-------------------------------------end-------------------------------------
>
>Who knows?  Maybe they are.  I don't see anything in the picture of the card
>that looks like a 65C02--or a 65C816 of the type (40-pin DIP) used in the GS,
>so maybe the TransWarp III is AE's first product to use the ASIC '816.  I 
>suppose someone will just have to order one and tell us what it's like.

The two square chips in the picture are in a package called PLCC for plastic
leadless chip carrier.  IMHO the smaller of the two squares is the uP.  The
transwarp GS also use the PLCC version of the WDC65C816.  Hope this clears
up any questions.

Roy