Newsgroups: sci.electronics
Path: utzoo!utgpu!nemeth
From: nemeth@gpu.utcs.utoronto.ca (Gabe Nemeth)
Subject: Caching a 68000
Message-ID: <1990Apr6.042829.8824@gpu.utcs.utoronto.ca>
Organization: UTCS Public Access
Date: Fri, 6 Apr 90 04:28:29 GMT

Hi.  I thought I'd bounce this idea off the net so here goes:
I want to speed up the 68000 processor in my machine from 8 to 16 MHz
but due to some custom chips etc., I can't just plop in a faster processor
with a new clock (or add a 68030 :-().  I have added appropriate glue logic
but this shifts the clock back and forth from 8 to 16 MHz depending on th
bus state but this method only gives about a 12MHz performance.
So - would it be possible to build a cache to hook a fast processor to a slower
bus by using dual ported ram?  The idea would be to have all data go through 
a ram that could be simultaneously addressed by both the cpu and the bus.  That
way data could accumulate in the ram until the system bus can use it.  Processor
reads from memory would simply wait for data to become available (slowing system
throughput).  I guess DMA would have to be done at the slower bus rate unless
the ram was the same size as the maximum DMA block.
Think this is worth trying?
Any other ideas for making a simple 68000 cache system?
Thanks in advance!
/gabe