Path: utzoo!utgpu!news-server.csri.toronto.edu!clyde.concordia.ca!uunet!cs.utexas.edu!sdd.hp.com!ucsd!ucbvax!ucsfcgl!pixar!mccoy
From: mccoy@pixar.UUCP (Daniel McCoy)
Newsgroups: comp.arch
Subject: Re: i860 benchmarks?
Summary: 80MFlops downhill with a tailwind.
Message-ID: <10649@pixar.UUCP>
Date: 7 May 90 18:25:02 GMT
References: <3632@newton.physics.purdue.edu>
Reply-To: mccoy@pixar.UUCP (Daniel McCoy)
Organization: Pixar -- Marin County, California
Lines: 36

In article <3632@newton.physics.purdue.edu> cca@newton.physics.purdue.edu (Charles C. Allen) writes:
>Where can I get ahold of some benchmarks for the i860 processor?  Any
>system configuration is OK (please mention it), but I'm looking at a
>brochure for the "Mercury MC860" in particular.  They claim 80Mflops
>for a single processor at 40Mhz.  What kind of MFlops are those?

Peak hand-coded pipelined assembly language.  Guaranteed not to exceed. 

In my experience with porting a heavy scalar floating point
renderer (100,000+ lines of C), using a beta release Greenhills compiler
from last september, with -O turned on only in the most critical areas
(the code wouldn't run otherwise, I did say beta), a 33MHz i860 came in 
with times faster than an R2000 (DecStation 3100) but slower than a 
25Mhz R3000 (SGI-4D/2xx) (MIPS 1.31 compiler with -O2 everywhere).

Intel has said that they will release Specmarks soon.  
Probably around the time that a supported released compiler is available.
(Over a year after the announcement of the i860.)
I think the Specmarks will inject a much needed dose of reality
into Intel's marketing hype.  Don't get me wrong, the i860 is a pretty 
fast chip so the reality isn't that bad.  I'm sure a 40Mhz i860 with 
a well designed memory system will be competitive.  But that 80 MFlop 
number is only meaningful for applications that have really tight main 
loops that can be hand-coded, and that happen to fit the i860 pipeline 
model well.

The tools have a way to go to catch up with MIPS. 
The chip above might actually be faster than the R3000,
but it doesn't matter to me until a compiler can push it faster.
Touting this as a RISC chip (whatever that means) and then
saying you should hand code your loops and use a machine level
debugger seems a little strange to me.

Dan McCoy	{ucbvax,sun}!pixar!mccoy

(Standard disclaimers apply. Personal opinion only.)