Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!sunybcs!ycshin
From: ycshin@acsu.Buffalo.EDU (YongChul Shin)
Newsgroups: comp.arch
Subject: VHDL descriptions of existing IC's ?
Message-ID: <24865@eerie.acsu.Buffalo.EDU>
Date: 8 May 90 02:35:10 GMT
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References:

I am working on a simulation of RAM's and ROM's, and making
VHDL descriptions of the existing memory IC's based on
manufacturer's data manuals.

Is there any such a behavioral model in VHDL provided from
IC manufacturers ? Otherwise, could someone send me a working
model that I can access.


Thank you in advance.


== Yong-Chul Shin                       ycshin@cs.buffalo.edu  ==
== 201 Bell Hall, Dept. of Electrical and Computer Engineering ==
== State University of New York at Buffalo, Buffalo, NY 14260  ==