Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uunet!van-bc!ubc-cs!cheddar.cc.ubc.ca!panon From: panon@cheddar.cc.ubc.ca (Paul-Andre Panon) Newsgroups: comp.sys.amiga Subject: Re: Why not SIMMs? (was Re: A3000) Message-ID: <7793@ubc-cs.UUCP> Date: 9 May 90 20:46:22 GMT References: <79733@tut.cis.ohio-state.edu> <744@sagpd1.UUCP> <2252@awdprime.UUCP> <101993@convex.convex.com> <1780@corpane.UUCP> <80283@tut.cis.ohio-state.edu> Sender: news@cs.ubc.ca Reply-To: panon@cheddar.cc.ubc.ca (Paul-Andre Panon) Organization: UBC Computing Centre, Vancouver, B.C., Canada Lines: 23 In article <80283@tut.cis.ohio-state.edu> Todd R Johnson writes: >In article <1780@corpane.UUCP> sparks@corpane.UUCP (John Sparks) writes: >[Both talk about how SIMMs are cheaper than ZIPs] > > The cheapest I've seen 4meg SIMMs is $500, but these should be >coming down. > > ---Todd Sure, but do SIMMs use page mode DRAMs and support cache BURST fills? I think the ZIP configuration Commodore uses does. As someone mentioned on comp.arch, if you're going to use an '040, it begs for BURST fills. This machine is obviously meant to be upgradeable with an '040. Looks like Commodore took a different approach for the 3000 memory design than they did for the 2500/30. Considering they seem to take about 2-3 years to put out a new machine, it seems like a good idea to provide a solid quick upgrade path to an '040 to me. Or did I put my foot in it again? Can you do cache burst fills with SIMMs? -- Paul-Andre_Panon@staff.ucs.ubc.ca or USERPAP1@UBCMTSG or Paul-Andre_Panon@undergrad.cs.ubc.ca or USERPAP1@mtsg.ubc.ca Looking for a .signature? "We've already got one. It is ver-ry ni-sce!"