Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!usc!zaphod.mps.ohio-state.edu!rpi!sci.ccny.cuny.edu!phri!phri!brent From: brent@asparagine.phri.nyu.edu (Brent Hobbs) Newsgroups: comp.sys.amiga.hardware Subject: Re: Cheap CPU cache (was Re: A500/14 MHz 68k?) Message-ID: Date: 2 May 90 21:34:07 GMT References: <8903@chaph.usc.edu> <10630@cbmvax.commodore.com> <3596@pikes.Colorado.EDU> <3673@minyos.xx.rmit.oz> <943@mpirbn.UUCP> Sender: news@phri.nyu.edu (News System) Organization: The Public Health Research Institute Lines: 23 In-Reply-To: p554mve@mpirbn.UUCP's message of 2 May 90 15:02:25 GMT Oh well, just when the traffic on this thread was beginning to die down... In article <943@mpirbn.UUCP> p554mve@mpirbn.UUCP (Michael van Elst) writes: > A second approach does give about 70-80% speedup on average programs and > will affect kickstart operations as well. This is a cache for the CPU. > A direct-mapped cache is easily built. You'll need some fast cache tag rams > plus the cache memory itself and three pals. This has been done for the > Atari ST for a while. Would you care to post the design for such a beast? BTW, where are you getting your performance figures? Anyone out there done this? > -- > Michael van Elst > UUCP: universe!local-cluster!milky-way!sol!earth!uunet!unido!mpirbn!p554mve > Internet: p554mve@mpirbn.mpifr-bonn.mpg.de "A potential Snark may lurk in every tree." -- ____________________________________________________________________ | Brent Hobbs -- internet: brent@asparagine.phri.nyu.edu | |My employers know nothing about my postings, | |so I can say anything I want with no disclaimer! |