Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!cbmvax!valentin
From: valentin@cbmvax.commodore.com (Valentin Pepelea)
Newsgroups: comp.sys.amiga.hardware
Subject: Re: A3000 CPU slot
Message-ID: <11413@cbmvax.commodore.com>
Date: 7 May 90 20:14:41 GMT
References: <11207@cbmvax.commodore.com> <11378@cbmvax.commodore.com> <72GN02gAa4MS01@amdahl.uts.amdahl.com>
Reply-To: valentin@cbmvax (Valentin Pepelea)
Distribution: comp
Organization: Commodore, West Chester, PA
Lines: 29

In article <72GN02gAa4MS01@amdahl.uts.amdahl.com> kim@uts.amdahl.com
(Kim E. DeVaughn) writes:
>
> Are you implying that Zorro3 now supports atomic read-write-update cycles now
> (i.e., test-and-set, and similar operations)?

Nowhere in my article did I imply such a thing, but yes, RMC (ream-modify-
cycles) are supported on the Zorro III bus. Semaphore implementations for
inter-processor synchronisation is thus simplified.

> And what about cache coherency (I'm not up on 030 bus-snooping specs)?

There are new functions in the Exec allowing you to flush the cache when
necessary. Furthermore, some regions of memory are declared as non-cacheable.
This is simple to implement using either hardware cache inhibition or
software translation table inhibition.

>> I'm part of the Snap, Crackle and Pop group. :-)
>
>Is that different than the "poof!" group?  :-)

Never heard of the "poof!" group, but you all now Capt. Crunch, don't you?

Valentin
-- 
The Goddess of democracy? "The tyrants     Name:    Valentin Pepelea
may distroy a statue,  but they cannot     Phone:   (215) 431-9327
kill a god."                               UseNet:  cbmvax!valentin@uunet.uu.net
             - Ancient Chinese Proverb     Claimer: I not Commodore spokesman be