Path: utzoo!utgpu!news-server.csri.toronto.edu!mailrus!uunet!ogicse!orstcs!jacobs.CS.ORST.EDU!throoph
From: throoph@jacobs.CS.ORST.EDU (Henry Throop)
Newsgroups: comp.sys.apple2
Subject: Re: Apple IIGS Rules! (vs IBM and Mac)
Message-ID: <18135@orstcs.CS.ORST.EDU>
Date: 9 May 90 23:39:02 GMT
References: <2561@crash.cts.com> <1990May8.184135.15142@eng.umd.edu>
Sender: usenet@orstcs.CS.ORST.EDU
Organization: Oregon State University - CS - Corvallis
Lines: 16

In article <1990May8.184135.15142@eng.umd.edu> cyliao@eng.umd.edu (Chun-Yao Liao) writes:
>Quite a lot people sent me mail asking for a schematic diagram of the circuit..
>Now, here, not a too good news, but I am trying.

Both the _IIgs Hardware Reference Manual_ and Gary Bond's _Beneath the
IIgs_ (?) have schematics for the stereo output decoder.  I'll try to
type it up into ASCII format somehow if there's interest.

Henry

>cyliao@wam.umd.edu     		o NeXT :  I put main frame power on two chips.


---
Henry Throop
Internet: throoph@jacobs.cs.orst.edu