Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sdd.hp.com!zaphod.mps.ohio-state.edu!mips!servitude!rogerk
From: rogerk@mips.COM (Roger B.A. Klorese)
Newsgroups: comp.sys.mips
Subject: Re: DBX processor registers & assembly code modification
Message-ID: <38579@mips.mips.COM>
Date: 8 May 90 06:38:31 GMT
References: <1990May7.151950.13684@sobeco.com>
Sender: news@mips.COM
Reply-To: rogerk@mips.COM (Roger B.A. Klorese)
Organization: MIPS Computer Systems, Inc.
Lines: 16

In article <1990May7.151950.13684@sobeco.com> stherien@sobeco.com (s.therien) writes:
>Problem description: I use the assign command to modify the contens of
>registers (ex: "assign $r0 = 0x12") then use the printregs command
>to verify that the register as realy been modify, register is still at
>his old value but in fact it has been modified. As soon as I step, printregs
>command reflect the new value for register 0. Does dbx has its own
>copy of registers, and processor registers are only refreshed while execution
>commands are given ? 

This is dependent on the value of the DBX setting "$datacache" which is by
default 1 (on).  If you "set $datacache=0" this cacheing is disabled.
-- 
ROGER B.A. KLORESE      MIPS Computer Systems, Inc.      phone: +1 408 720-2939
MS 4-02    950 DeGuigne Dr.   Sunnyvale, CA  94086   voicemail: +1 408 524-7421 
rogerk@mips.COM         {ames,decwrl,pyramid}!mips!rogerk         "I'm the NLA"
"Two guys, one cart, fresh pasta... *you* figure it out." -- Suzanne Sugarbaker