Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sdd.hp.com!zaphod.mps.ohio-state.edu!usc!apple!snorkelwacker!bloom-beacon!eru!luth!sunic!mcsun!inria!irisa!parasite.irisa.fr!seznec From: seznec@parasite.irisa.fr (Seznec Andre) Newsgroups: comp.arch Subject: The curious floating-point arithmetic on the IBM RS6000 Message-ID: <1990May31.092947.29780@irisa.fr> Date: 31 May 90 09:29:47 GMT References: <30331@cup.portal.com> Sender: news@irisa.fr Organization: IRISA, Rennes (FR) Lines: 3 There has already been a discussion on the floating-point MAF (multiply-add) on the IBM RS6000. Since this discussion, I have studied the implementation of the floating unit in the RS6000 (see paper "RISC System 6000 Floating-Point Unit" by B.Olsson and al). When executing a MAF, the result flowing out from the the multiplier is not rounded when entering the adder (106 bits of mantissa), but the other operand of the addition (or substract) is a normal 64 bits floating-point data; authors of the paper t