Path: utzoo!attcan!uunet!willett!ForthNet From: ForthNet@willett.UUCP (ForthNet articles from GEnie) Newsgroups: comp.lang.forth Subject: Forth Engines / Harris Message-ID: <1013.UUL1.3#5129@willett.UUCP> Date: 26 May 90 03:36:14 GMT Organization: Latest link in the ForthNet chain. (Pgh, PA) Lines: 18 Date: 05-24-90 (17:26) Number: 543 (Echo) To: GARY SMITH Refer#: 536 From: ANIL RODRIX Read: NO Subj: HARRIS RTX DESIGN CONTEST Status: PUBLIC MESSAGE I havent tried yet, but it seems to me the asic bus is just like a data bus. G@ and G! dont write to the bus ( although the data will appear during the write cycle on the bus); 3 G@ should get the value stored in the No. 3 ASIC register. You cant set a bit on the bus - it is not a register or port. But you coud set bits if allowed in the 24 internal ASIC registers or 8 more external addresses if youve set up something. Jack W. thought the external addressing was deactivated, so I'm not sure about that. Addresses from 24 to 31 are decoded on GA0,1,2, and I think GIO is active only for these external addresses. ----- This message came from GEnie via willett through a semi-automated process. Report problems to: uunet!willett!dwp or willett!dwp@hobbes.cert.sei.cmu.edu