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From: ForthNet@willett.UUCP (ForthNet articles from GEnie)
Newsgroups: comp.lang.forth
Subject: Forth Engines / Harris
Message-ID: <1023.UUL1.3#5129@willett.UUCP>
Date: 28 May 90 00:50:43 GMT
Organization: Latest link in the ForthNet chain.  (Pgh, PA)
Lines: 30

Category 6,  Topic 15
Message 179       Sun May 27, 1990
F.SERGEANT [Frank]           at 12:53 CDT
 
 To: Tom Short        Re: RTX carry bit stuck
 > example:
 > BINARY
 > 1 2*C 2*C .
 > gives 111 when it should be 100 (if the carry bit is initially 0).
 No, your carry bit is working fine.  The carry bit is not a dedicated  user
register.  Just like on any microprocessor, it is subject to being  changed by
any instruction that affects it.  When you are in the outer  interpreter and
the '1' is performed you do not know the current state  of the carry. 
Immediately after the first '2*C' is performed you can  expect the carry to be
clear.  However, you can no longer count on that  being true by the time the
RTX begins to perform the second '2*C'  because you are in the outer
interpreter!  It performs numerous  instructions between the two '2*C's and
obviously leaves the carry bit  set.  Here is proof:
    HEX
    : X  ( u -)  2*C  2*C  U.  ;
    : Y  ( u -)  CR@ FFFE AND CR!  ( ie clear the carry bit)
                 2*C  2*C  U.  ;
    BINARY
    1  2*C  2*C  U.     -->  111
    1  X                -->  110
    1  Y                -->  100
 Hope this clears things up.    -- Frank
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