Path: utzoo!attcan!uunet!snorkelwacker!usc!ucsd!helios.ee.lbl.gov!nosc!marlin!aburto
From: aburto@marlin.NOSC.MIL (Alfred A. Aburto)
Newsgroups: comp.sys.amiga.tech
Subject: Re: PowerVisor and floating point coprocessor
Message-ID: <1420@marlin.NOSC.MIL>
Date: 30 May 90 15:30:23 GMT
References: <23May1990110844167@BLEKUL11.BITNET>
Reply-To: aburto@marlin.nosc.mil.UUCP (Alfred A. Aburto)
Distribution: comp.sys.amiga.tech
Organization: Naval Ocean Systems Center, San Diego
Lines: 35
X-Local-Date: 30 May 90 08:30:23 PDT

In article <23May1990110844167@BLEKUL11.BITNET> GHGAPAR@BLEKUL11.BITNET writes:
>Hello everyone,
>
>I would like to make my debugger (PowerVisor) compatible with every
>Amiga. This includes Amigas with coprocessors. For the single
>stepping and crashtrapping features I make extensive use of the
>stackframe exec saves before each task switch. Because a floating
>point processor has its own registers that need to be saved, I
>suppose this stackframe will be different on such a machine.
>I suspect that the fsave and frestore (or something like that) have
>something to do with this, because I saw those two instructions in
>the alternative Schedule in exec (The one for coprocessors). How
>do these two instructions work and what does the stack look like on
>a floating point Amiga ?
>

Please note that the Motorola Programmer's Reference Manual M68000PM/AD 
dated 1989 has an error in describing the FSAVE instruction format. Page
4-17 of that document shows the FSAVE instruction format with bit 8 
(counting from zero) set to zero, however bit 8 is a 1 for this 
instruction. 

Also, a problem I found when checking for the presence or absence of 
a 68851 MMU co-processor (020 only) is that while I was expecting an
F-Line exception (vector $2C) for the PFLUSHA instruction on an 020
without 68851 MMU I received INSTEAD a Co-Processor Protocol exception
(vector $34).  This happened with an 020/882 board from CSA which had
no 68851 MMU and it indicated some kind of a hardware problem with
the Co-Processor interface.  Well, I learned a lesson here and now I
check for both types of exceptions on the 020/030 to prevent an 
uncontrolled system crash (just in case).

Al Aburto
aburto@marlin.nosc.mil