Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uunet!cbmvax!daveh
From: daveh@cbmvax.commodore.com (Dave Haynie)
Newsgroups: comp.sys.amiga.tech
Subject: Re: PowerVisor and floating point coprocessor
Message-ID: <11981@cbmvax.commodore.com>
Date: 30 May 90 20:02:09 GMT
References: <23May1990110844167@BLEKUL11.BITNET> <1420@marlin.NOSC.MIL> <11977@cbmvax.commodore.com>
Reply-To: daveh@cbmvax (Dave Haynie)
Distribution: comp.sys.amiga.tech
Organization: Commodore, West Chester, PA
Lines: 98

In article <11977@cbmvax.commodore.com> valentin@cbmvax (Valentin Pepelea) writes:
>In article <1420@marlin.NOSC.MIL> aburto@marlin.nosc.mil.UUCP
>(Alfred A. Aburto) writes:

>> Also, a problem I found when checking for the presence or absence of 
>> a 68851 MMU co-processor (020 only) is that while I was expecting an
>> F-Line exception (vector $2C) for the PFLUSHA instruction on an 020
>> without 68851 MMU I received INSTEAD a Co-Processor Protocol exception
>> (vector $34).  This happened with an 020/882 board from CSA which had
>> no 68851 MMU and it indicated some kind of a hardware problem with
>> the Co-Processor interface.

>Dave Haynie reported the same problem with the CSA board back when he was
>testing his SetCPU program. Try out SetCPU and see what kind of processors
>it reports.

>The problem seems to be that the CSA board improperly decodes the FCx lines
>and assumes that any F-line instruction is a math coprocessor instruction.

Yup, that's exactly what I found with older SetCPUs -- on some 68020 boards,
the program would crash.  Later, when I fixed it for 68030 operation, the
crashes stopped, but the program erronously reported the presence of an MMU.

The culprit, as Valentin mentioned, was the FPU decoding hardware on some of
the 68020 boards out there.  As shown in the Motorola documentation, each
coprocessor has it's own CPU space address, and proper design will decode the
full address for FPU select.  But, in some designs, they don't, and what you
end up with is an FPU that responds to MMU instructions.

What I currently do in SetCPU is this:

    ;======================================================================
    ;
    ;	This function returns 0L if the system contains no MMU, 
    ;	68851L if the system does contain an 68851, or the CPU number
    ;	for CPUs with integral CPUs.
    ;
    ;	This routine used to lock up on at least some CSA 68020 
    ;	boards, though it runs just fine on those from Ronin and 
    ;	Commodore, as well as all 68030 boards it's been tested on.
    ;
    ;	ULONG GetMMUType()
    ;
    ;======================================================================

_GetMMUType:
	move.l	4,a6			; Get ExecBase
	jsr	TestFlags		; Check extended CPU types
	cmp.l	#0,d0
	beq	MMURealTest
	rts

	; For any other machine, a real test must be done.  The test will
	; try an MMU instruction.  The instruction will fail unless we're
	; on a "bogus MMU" system, where the FPU responds as an MMU.
MMURealTest:
	movem.l	a3/a4/a5,-(sp)		; Save this stuff
	move.l	#0,a1	
	CALLSYS	FindTask		; Call FindTask(0L)
	move.l	d0,a3

	move.l	TC_TRAPCODE(a3),a4	; Change the exception vector
	move.l	#MMUTraps,TC_TRAPCODE(a3)
	
	move.l	#-1,d0			; Try to detect undecode FPU
	subq.l	#4,sp			; Get a local variable
	PMOVE_	tc,(sp)			; Let's try an MMU instruction
	addq.l	#4,sp			; Return that local
	move.l	a4,TC_TRAPCODE(a3)	; Reset exception stuff
	movem.l	(sp)+,a3/a4/a5		; and return the registers
	rts

	; This is the exception code.  No matter what machine we're on,
	; we get an exception.  If the MMU's in place, we should get a
	; privilige violation; if not, an F-Line emulation exception.
MMUTraps:
	move.l	(sp)+,d0		; Get Amiga supplied exception #
	cmpi	#11,d0			; Is it an F-Line?
	beq	MMUNope			; If so, go to the fail routine
	move.l	#68851,d0		; We have MMU
	addq.l	#4,2(sp)		; Skip the MMU instruction
	rte
MMUNope:
	moveq.l	#0,d0			; It dinna woik,
	addq.l	#4,2(sp)		; Skip the MMU instruction
	rte

Basically, I assume things are messed up, and set d0 to -1.  If things are
messed up, we get a valid user-mode FPU instruction, and therefore never
take an exception.  If there's no MMU installed, the exception will be an
F-line exception, on system with an MMU, it's a privilige violation.  I
don't bother checking for an MMU anymore if I know the CPU is a 68030 or
68040 (the TestFlags routine acertains this).

-- 
Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests"
   {uunet|pyramid|rutgers}!cbmvax!daveh      PLINK: hazy     BIX: hazy
	"I have been given the freedom to do as I see fit" -REM