Path: utzoo!utgpu!news-server.csri.toronto.edu!clyde.concordia.ca!uunet!tut.cis.ohio-state.edu!zaphod.mps.ohio-state.edu!sunybcs!rutgers!njin!uupsi!sunic!dkuug!imada!micro From: micro@imada.dk (Claus Pedersen) Newsgroups: comp.sys.atari.st Subject: Re: I have a dream .... Message-ID: <770@imada.dk> Date: 2 Jun 90 20:36:30 GMT References: <1990May29.203020.28441@pmsmam.uucp> <80988@tut.cis.ohio-state.edu> <769@imada.dk> <13202@wpi.wpi.edu> <81101@tut.cis.ohio-state.edu> Reply-To: micro@imada.UUCP (Claus Pedersen) Organization: Dept. of Mathematics and Computer Science, Odense University, Denmark Lines: 51 In article <81101@tut.cis.ohio-state.edu> david r watters writes: >In article <13202@wpi.wpi.edu> jdutka@wpi.wpi.edu (John Dutka) writes: >>In article <769@imada.dk> micro@imada.UUCP (Claus Pedersen) writes: >>>Now you must be dreaming - just about the only thing your A3000 have is >>>a 68030. And that is with 2 wait states on *fast ram*. >>>Who needs Amiga500 graphics on a 68030 machine anyway?? >> >>with a 68882 and resolutions up to 1280x800 - that ISN`T 500 graphics. The >>500 will be able to do it later, but for $3039 for a 2 meg A3000 with a 25MHz >>68030/68882 under the educational discount, it's hard to beat. >>| John Dutka, Jr. | -Mechanical Engineers On The Prowl | > [sales stuff deleted] > >That 2 wait state bit is incorrect anyways! Now that is what the article in BYTE states (2 wait states). It also states that it can transfer 32 Mbytes/sec in burst transfer, and good weather. My 68030 data sheet says that after the transfer is initiated the CPU will read ONE 4 byte word every cycle (on a 25Mhz 68030 it means 100 Mb/s???). Any way the graphics part of the machine, is doll except for the figure 1280, the bus is 16 bit (call that a 32bitter again), to be compatible or ???? The main feature added to the graphics subsystem is a flicker-fixer. As I remember C= promised 16M colors, 32 bit blitter and more of that kind. The 68030 have instructions to manipulate bit aligned graphics (such as Bitfield Insert). Which means that if it were on a fast bus it would not need the blitter, as the bitblit loop would run from the internal cache, and not compete on buscycles for fetching instructions. And 1280x800 is with interlase. [to superpositioned 1280x400 images, or so it appears to be on a 500 ;-)] Yes in comp.sys.amiga, I read that the chipset would be available to the 16 bit series too. And 1280x400 (without interlase) should be possible on 500 to (it is the same number of buscycles as 640x200 in 4 bitplanes), and the basic 500 runs just about 2 Mhz in that configuration :-() [We ran a small program which should execute in 90 secs (2 DBRAs)(7.09Mhz), and only when we turned the screen off we could get the 90 secs, and in 640x4 bitplanes, it took 260 secs!!! (remember ZX81 (or Timex) :-)] >ps. And a ST-emulator if you want. [How does you simulate 640x400 noninterlase 72 Hz quality]> >dw -Klaus (should we not stop now???)