Path: utzoo!yunexus!ists!helios.physics.utoronto.ca!news-server.csri.toronto.edu!mailrus!uwm.edu!cs.utexas.edu!sdd.hp.com!hp-pcd!hplsla!janh From: janh@hplsla.HP.COM (Jan Hofland) Newsgroups: comp.sys.ibm.pc Subject: Re: DRAM speed Message-ID: <5190091@hplsla.HP.COM> Date: 29 May 90 02:41:13 GMT Article-I.D.: hplsla.5190091 References: <2660AECB.29143@paris.ics.uci.edu> Organization: HP Lake Stevens, WA Lines: 13 There is NO reason not to use DRAMs rated faster than the required application. The power consumed is primarily a function of the operating frequency and has nothing to do with how fast the device will actually go. A 70ns device and a 120 ns device from the same vendor (assuming the same process) will consume virtually the same power in a particular application. With regard to timing, when reading, there is a design minimum access time. Any device faster than this minimum will still meet spec and, in fact, give more margin. When writing, the data must be available when the system generates column address strobe and any device which meets the design minimums will work. Regards, Jan Hofland