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From: kaleb@mars.jpl.nasa.gov (Kaleb Keithley)
Newsgroups: comp.sys.ibm.pc
Subject: Re: 386 Memory question (simms)
Message-ID: <3873@jato.Jpl.Nasa.Gov>
Date: 30 May 90 15:57:30 GMT
References: <5923@buengc.BU.EDU> <4922@plains.UUCP>
Sender: news@jato.Jpl.Nasa.Gov
Reply-To: kaleb@mars.UUCP (Kaleb Keithley)
Distribution: usa
Organization: Jet Propulsion Laboratory, Pasadena, CA.
Lines: 26

In article <4922@plains.UUCP> kperson@plains.UUCP (Kerry Person) writes:
>In article <5923@buengc.BU.EDU> rem@buengc.bu.edu (Robert E. Mee) writes:
>> [original question deleted]
>
>Keep in mind how the data is stored.  Each of those SIMMs stores four bits of
>data.  If you place a 1 Meg SIMM in place of the four 256's, the
>machine has no way to know that all sixteen bits should now be stored in one
>chip.  In fact it is physically impossible, without some major hardware
>changes.  The chips have to work parallel to each other, so if you increase
>the capacity of the first four bits, you gotta do the same with the rest.
>
>At least that's the way it seems it should work.  Or does the memory get 
>stored 32 bits at a time on a 386?  Conflicting opinions welcomed.
>

Here is a conflicting *fact*!  The SIMMs used in PCS are 9 bits wide; 8 data
bits, plus 1 parity bit.  SX machines have a 16 bit memory bus, and require
that memory be added in 16 bit increments; two SIMMs are required two do this.
A DX machine (full blown 386) has a 32 bit memory bus, and four SIMMs are
required to do this.  That is why you can put 2MB at a time into SX machines,
but must put 4MB into a DX.  Or 512KB or 1MB if you're using 256K SIMMs.

Netiquet reminder: If you don't really know, then don't post.

kaleb@thyme.jpl.nasa.gov            Jet Propeller Labs
Kaleb Keithley