Path: utzoo!utgpu!news-server.csri.toronto.edu!mailrus!cs.utexas.edu!usc!zaphod.mps.ohio-state.edu!sdd.hp.com!elroy.jpl.nasa.gov!peregrine!ccicpg!legs!kaz From: kaz@legs.UUCP (Richard Kaczmarek) Newsgroups: comp.sys.ibm.pc Subject: Re: What's IRQ 2 used for on an AT? Summary: IRQ 2 -> IRQ 9 Message-ID: <2865@legs.UUCP> Date: 31 May 90 17:20:08 GMT References: <749@ucsvc.ucs.unimelb.edu.au> Organization: AST Research, ASIC (VLSI) Development, Irvine, CA Lines: 28 There are two 8259 interrupt controllers in the AT. I believe the master is located at address 20h and the slave is at A0h. The master handles IRQs 0 through 7 and the slave handles IRQs 8 through 15. The master "yanks" the slave via IRQ 2. From what I understand (I'm a software weenie, not hardware), IRQ 2 is remapped in hardware to IRQ 9. Any hardware requests to IRQ 2 yank IRQ 9's line. The processor, by virtue of the IRQ number, uses the interrupt vector table to call some code relating to that hardware request. Although IRQ 2's vector should be used, recall it was remapped to IRQ 9; IRQ 9's software interrupt vector, then, is jumped to when either an IRQ 9 or a real IRQ 2 occurs. There's a piece of BIOS code sitting where IRQ 9's interrupt vector is pointing which determines who _really_ yanked the line (2 or 9). If 9, it continues on; if 2, it jumps over to 2's interrupt vector. That's why your stuff worked. Although you set it to 2, the motherboard's hardware remapped it to 9. The software there took care of it, no problem. -- Rich Kaczmarek - uucp: ...!uunet!ccicpg!legs!kaz AST Research Inc. Fax: (714) 727-9358 P. O. Box 19658 Tel: (714) 727-8621 Irvine, California 92713-9658