Path: utzoo!utgpu!news-server.csri.toronto.edu!mailrus!iuvax!rutgers!usc!zaphod.mps.ohio-state.edu!mips!hal!mark From: mark@mips.COM (Mark G. Johnson) Newsgroups: comp.arch Subject: Re: i860 registers/chip in general Message-ID: <39315@mips.mips.COM> Date: 12 Jun 90 00:43:10 GMT References: <495@tau.megatek.uucp> <8744@brazos.Rice.edu> <1635@charon.cwi.nl> Sender: news@mips.COM Lines: 15 In article <1635@charon.cwi.nl> dik@cwi.nl (Dik T. Winter) writes: > ... it is important to have ... >a.... >b.... >c. Conversion from integer to floating point vice-versa should go from > integer registers to floating point registers, and the other way around. Has there ever been an architecture developed which [1] had/has separate registers for FP and for integers; [2] obeyed Winter's property (c.) above? Machines like the 88k (having non-separate int/FP registers) do so trivially, of course. -- -- Mark Johnson MIPS Computer Systems, 930 E. Arques M/S 2-02, Sunnyvale, CA 94086 (408) 524-8308 mark@mips.com {or ...!decwrl!mips!mark}