Path: utzoo!attcan!uunet!cs.utexas.edu!usc!apple!motcsd!dms!albaugh
From: albaugh@dms.UUCP (Mike Albaugh)
Newsgroups: comp.arch
Subject: Re: Magnetic amplifiers? [was Re: Mercury delay lines]
Message-ID: <1096@dms.UUCP>
Date: 13 Jun 90 14:56:54 GMT
References: <3190@husc6.harvard.edu>
Organization: Atari Games Inc., Milpitas, CA
Lines: 58

From article <3190@husc6.harvard.edu>, by mike@mgh-znmr.harvard.EDU (Mike Vevea):
> Refering to magnetic amplifiers, 
> In article <25079@weitek.WEITEK.COM> weaver@weitek.UUCP (Michael Weaver) writes:
>>The only commercial use I have heard of was in one of the first 
>>core memories sold by IBM.
> 
> I don't remember much about how they worked, but the Univac/Remington Rand
> SS-80 and SS-90, built in the late 1950s used magnetic amplifiers instead
> of tubes or transisters as the active element in their gates.  There are
> a few others around (Ed Gould?? Mike Albaugh?? Can you correct my fading
                                  ^^^^^^^^^^^^
You rang :-)

> memories?).  The computer club at UC Berkeley had a couple of these in
> the late 1960s/early 1970s.

	And I personally salvaged one, but ran out of time/money in 1976 :-(

	Anyway, I was going to email, and still suggest email to me for
followups, but there were a few points relevant to comp.arch, and I thought
I'd bring them up.

	The mag-amps in the SS-90 (and in a similar RCA machine I know nothing
else about) were not exactly as described by a previous poster (or in
contemporary textbooks. Rather than having separate clock and sense windings,
the "clock" winding was essentially in series with the output, hence the
input to the next gate. The gates were arranged in a two-phase scheme. That
is, the "A-phase" cores fed their outputs to the inputs of the "B-phase" cores
and vice-versa. The basic element had only two windings. If the input winding
of a core recieved a pulse, the core "flipped". On the next phase the energy
of the "clock" winding was disipated in "resetting" the core, and very little
appeared on the output. But if the input had not been pulsed, the clock pulse
went straight through and was able to set the next stage. This is, of course,
a gross over-simplification, but the basic point is that these were clocked
inverters. Only the register bits were actually nearly as simple as described.
A lot of "magic" went into getting usable fan-out from the more general gates.


	Logic was performed by diode "or" gates on the inputs of the cores.
One interesting side-effect of having been exposed early to this was that
I ended up taking pretty easily to NMOS, which also favors two-phase clocked
dynamic storage nors :-) (while my ttl-raised companions prayed for NANDS)

	BTW, the card-reader contained a buffer memory implemented with
"diode-capacitor-diode" storage, very much like a discrete DRAM cell!

	The machine was descended from the "Cambridge Air-force Computer"
of 1956, but I believe there were a few in commercial use as late as 1975.
Not a bad life-span...

	Like I said, email for details, comp.nostalgia signing off now...

					Mike

| Mike Albaugh (albaugh@dms.UUCP || {...decwrl!pyramid!}weitek!dms!albaugh)
| Atari Games Corp (Arcade Games, no relation to the makers of the ST)
| 675 Sycamore Dr. Milpitas, CA 95035		voice: (408)434-1709
| The opinions expressed are my own (Boy, are they ever)