Path: utzoo!utgpu!news-server.csri.toronto.edu!ois.db.toronto.edu!jonah Newsgroups: comp.arch From: jonah@db.toronto.edu (Jeff Lee) Subject: Re: Processor architecture to support functional languages Message-ID: <90Jun15.211837edt.2773@ois.db.toronto.edu> Organization: University of Toronto, CSRI References: <5439@midway.cs.glasgow.ac.uk> Date: 16 Jun 90 01:19:19 GMT Lines: 25 aglew@basagran.csg.uiuc.edu (Andy Glew) writes: >Why isn't this done? Well, let's see - say I have 128 threads. I'm >on a 32 bit machine, but say that only 1G of addresses are accessible >to the user. And say maybe that 512M of address space is needed for >non-stack related applications, like text, bss, the heap, and mapped >files (can't have too many mapped files :-( ). > So, we have 512M for 128 stacks. 19-7=12 => 4K per stack. Not >very much, is it? (In fact, it's smaller than the page size for high >performance machines). Sorry Andy, 1) 512M==2**29, hence you could have 128*4MB stacks, not 4KB stacks -- or 128K*4KB stacks. 2) 4KB is a fairly reasonable page size. There was a time when 4KB was considered a *large* page size; of course opinions have changed. However, 4KB is the smallest page size that completely maps 4GB (32-bit addresses) in two levels of page map tables with 32-bit PMT entries. I believe that Sun adopted 8KB pages so they could cover 16MB (the physical address range of the 68000) in a single level PMT. Then of course they were stuck with it. (Now, rumour has it that the Sparcstation hits the wall when given more than 16MB of memory. ;-) j.