Path: utzoo!utgpu!news-server.csri.toronto.edu!mailrus!cs.utexas.edu!samsung!usc!apple!vsi1!daver!bungi.com!news From: ian@sibyl.eleceng.ua.oz.au Newsgroups: comp.sys.nsc.32k Subject: Re: Hardware Problems Message-ID: <9006130456.11656@munnari.oz.au> Date: 13 Jun 90 04:26:35 GMT References: <> Sender: news@daver.bungi.com Lines: 19 Approved: news@daver.bungi.com George Scolaro writes: > > Poking around the decoder PAL reveals a strange anomaly. /ioinh is > > permanantly high and yet I get pulses out of /icu. This, according to > > the PAL equations, is impossible! The only explanation I can think of > > No, the I/O access is inhibited if /IOINH is low. i.e. it should be high > for a valid I/O access to proceed. Sorry. I often get confused with negative logic. The problem is no doubt just a bad connection somewhere, but where is a bit tricky. I am running out of things I can test with a logic probe. If I haven't fixed by this weekend I'll take it into Uni and use a logic analyser on it. I have been a bit reluctant to do that because of the difficulty of attaching probes to either the PGA chips or the PLCC chips. Still, the ROM, the PALS and the buffers should provide access to most interesting signals. Ian Dall