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From: cooper@hpsrad.enet.dec.com (cooper in the shadows)
Newsgroups: comp.arch
Subject: Re: 486 bugs -- it's in there!
Message-ID: <1931@ryn.esg.dec.com>
Date: 28 Jun 90 06:43:45 GMT
Sender: guest@ryn.esg.dec.com
Organization: Dec Fault Tolerant Systems, Marlboro, MA
Lines: 19


In article <2813@medusa.informatik.uni-erlangen.de>, csbrod@medusa.informatik.uni-erlangen.de (Claus Brod ) writes...

>Motorola's 68000 had a kind of quirk that caused a clr command to
>first read the addressed location and then clear it. This led
>to numerous difficulties when clearing I/O registers. This one,
>however, has always been documented by Motorola, so it's more
>a feature than a bug. Subsequent 680x0s perform a clr operation
>as God intended.

This was not unique to the 68000.  The clr instruction on certain
PDP-11'S used to do the same thing.  If you wanted to clear an IO
register you had to write a zero out rather than do a clr location.

Also there have been innumerable (ie i don't know how many) machies
that didn't even have a clear instruction but had you xor the location
with itself.  The 360/370s where like this.

				shades