Path: utzoo!attcan!uunet!tut.cis.ohio-state.edu!ucsd!network.ucsd.edu!celit!ps From: ps@fps.com (Patricia Shanahan) Newsgroups: comp.arch Subject: Re: Bloat costs Message-ID: <9582@celit.fps.com> Date: 28 Jun 90 21:20:52 GMT References: <1990Jun27.011149.2406@Stardent.COM> <63034@sgi.sgi.com> <9570@celit.fps.com> <63065@sgi.sgi.com> Sender: daemon@fps.com Reply-To: ps@fps.com (Patricia Shanahan) Distribution: na Organization: FPS Computing Inc., San Diego CA Lines: 42 In article <63065@sgi.sgi.com> karsh@trifolium.sgi.com (Bruce Karsh) writes: >In article <9570@celit.fps.com> ps@fps.com (Patricia Shanahan) writes: > [Dumb remark about non-usability of integer complex for FFT] > >Integer-complex FFT's are probably executed much more often than floating >point FFT's. There are several microprocessor chips on the market, notably >the Motorola DSP56001, which are highly optimized for exactly this >calculation. There are lots of articles on how to do this. Sorry - I was wrong about that. I forgot the DSP micros. I beg their pardon. >The change from having integer multiplies being much faster than FP >multiplies rather than having them be slower is one of the most interesting >trends that's occuring in computer architecture. I think in the long term it is going to turn out to be a temporary aberration. A system that can do FP multiplies reasonably fast probably has the ability somewhere to do e.g. 53*53->53 bit integer multiplies. It just isn't necessarily accessible from the integer processor. The general trend seems to be for getting the data to and from the registers to become the real bottleneck, and arithmetic to get so fast that you can do it as fast as the data can be moved around. I expect in the long term a lot of operations will all become the same speed. > >Is it really true that SPARC fp register to register ops are all constant- >time? Are SPARC fp adds and multiplies both equal-time? This isn't true for >the MIPS. Does anyone out there know for sure? I didn't actually say they are constant time, just equal architectural status and similar time. Also, remember that there are several implementations of SPARC around with different floating point speeds. How does the difference in speed between a MIPS FP add and a MIPS FP multiply compare with the difference between a SPARC integer add and a typical SPARC integer multiply. -- Patricia Shanahan ps@fps.com uucp : ucsd!celerity!ps phone: (619) 271-9940