Path: utzoo!utgpu!news-server.csri.toronto.edu!mailrus!cs.utexas.edu!usc!samsung!munnari.oz.au!goanna!ok
From: ok@goanna.cs.rmit.oz.au (Richard A. O'Keefe)
Newsgroups: comp.arch
Subject: Re: Paging page tables
Summary: inverse page tables, anyone?
Message-ID: <3341@goanna.cs.rmit.oz.au>
Date: 30 Jun 90 06:36:01 GMT
References: <3300142@m.cs.uiuc.edu> <4137@taux01.nsc.com> <1990Jun29.213236.4888@cbnewsh.att.com>
Organization: Comp Sci, RMIT, Melbourne, Australia
Lines: 23

There's been a lot of talk about paging page tables.
The basic problem is that unless you do something to prevent it,
the amount of *physical* memory taken up by page tables
is proportional to the amount of *virtual* memory allocated.

One really beautiful idea is to stand the whole thing on its
head and have your page tables map from *physical* pages to
*virtual*, so that the space taken up by page tables is a
fixed fraction of the size of *physical* memory.  This is the
technique used on the IBM RT PC.

(1) Would someone who really understands the technique care to post
    a short description?
(2) When I read the RT PC bumf, I was _sure_ that I had seen the
    technique described before, but I couldn't and still can't
    remember where.  Does anyone know where the "inverted page tables"
    idea was first published/used?
(3) IBM hold the patent.  Is any other manufacturer known to have
    been granted licence to use the technique?
(4) Does the RS/6000 use inverted page tables or paged page tables?

-- 
"private morality" is an oxymoron, like "peaceful war".