Path: utzoo!utgpu!news-server.csri.toronto.edu!mailrus!wuarchive!udel!haven!umd5!brewer
From: brewer@umd5.umd.edu (Peter Brewer)
Newsgroups: comp.sys.super
Subject: compilers for non-heterogeneous arhchitectures
Message-ID: <6771@umd5.umd.edu>
Date: 28 Jun 90 03:51:16 GMT
Reply-To: brewer@umd5.umd.edu (Peter Brewer)
Organization: University of Maryland, College Park
Lines: 10

I was reading in EE times about the FPS system with multiple sparc processors,
vector processing units, and 860 chips to do 'forever jobs'. Gee I wonder
what a compiler would like like for this thing?? I know on machines which
are hybrids like the CM-2 you end up playing games with adding facilities to
'load' the different instructions at the appropriate times in the generated
code.. but the CM-2 is 'synchronous'.. what happens with an asynchronous 
beast like that?

-- Peter Brewer
   brewer@umd5.umd.edu..