Path: utzoo!attcan!uunet!snorkelwacker!think!huxley!hoque
From: hoque@huxley.UUCP (Tareq Hoque)
Newsgroups: sci.electronics
Subject: Re: Frame Buffers
Message-ID: <540@huxley.UUCP>
Date: 28 Jun 90 14:38:49 GMT
References: <2229@mindlink.UUCP>
Reply-To: hoque@huxley.UUCP (Tareq Hoque)
Organization: Bitstream, Inc., Cambridge, MA
Lines: 17


Before vram came out most frame buffers were created with standard memory
devices, but the user would have to interleave (some times called banking)
several banks of memory to accomodate the slow access times of the memory
devices.  If the width of the memory device was not as wide as the pixel
data width (as in x1 Drams), then you would have to replicate the memory
banks for each data bit and run them in parallel.  As you can imagine old
fashion framebuffers could get very big.

As an example an 8x interleave would mean that a memory device supplies every
eigth pixel.  The easiest way of accomplishing this would be to take a
parallel in - serial out shift register that is 8 bits wide, with a shift
clock that is connected to the pixel clock.  This circuit would be
duplicated eight times to supply each bit of an eight bit pixel.

hope that helps.
=tareq